Module electronics: driver, TIA/LA, DSP, controller, power

Behind the two optical sub-assemblies sits a small circuit board that does everything else: turns the host's electrical bits into laser current, turns photocurrent back into clean data, keeps the laser at constant power over temperature and age, measures and reports, obeys the low-speed pins and lives within a strict power budget. This page walks the board block by block and links each block to what you see from outside — pins, memory bytes and DDM values.

Block diagram

                    ┌─────────────── module PCB ───────────────┐
host Tx lanes ──►  CDR / DSP ──► laser DRIVER ──► TOSA (laser + MPD)  ──► fibre
                    (retime,       (bias +           │
                     equalise,      modulation)      │ monitor current
                     gearbox)                        ▼
                                              ┌── MCU ───┐  ◄── I²C (SCL/SDA)
                                              │ APC loop │  ◄── TX_DISABLE, RS0/1, LPMode…
                                              │ ADC/DDM  │  ──► TX_FAULT, RX_LOS, IntL
                                              │ memory   │
                                              └──────────┘
host Rx lanes ◄──  CDR / DSP ◄── LA / linear amp ◄── TIA ◄── ROSA (PD)  ◄── fibre
                                                                 │
power 3.3 V ──► inrush limiter ──► LDO / DC-DC (1.8 V, 1.2 V, 0.9 V …) ──► every block

The optical parts: TOSA, ROSA, BOSA; the clock block: CDR; the DSP in depth: Modulation & DSP.

Laser driver

Receiver chain: TIA and LA

What the photodiode itself contributes: Receivers.

Retiming and signal processing

• CDR / retimer — recovers the clock and re-times data on one or both sides; found in SFP+ (host-side), SFP28/QSFP28 (both sides), optional bypass (CDR).
• DSP — on PAM4 modules replaces the LA/CDR pair with ADC → equaliser → decision → DAC; also performs the gearbox (8 host lanes at 50G ↔ 4 media lanes at 100G) and, in coherent modules, the FEC. The most power-hungry chip on the board (3–6 W in a 400G module) — Modulation & DSP.
• Linear (LPO) designs delete the DSP and let the host SerDes equalise; the module becomes driver + TIA only.

Microcontroller

The MCU runs the module: samples temperature, Vcc, bias, Tx and Rx monitors through an ADC and converts them with factory calibration; runs the APC and, where present, the TEC control loop; compares against thresholds and raises flags and IntL; answers the two-wire bus, emulating the memory map with its pages and banks; enforces passwords and protection; on CMIS modules runs the state machines and CDB. Details, and why this matters for programming: Controller & firmware.

Power distribution

DDM Vcc is measured after the input filter — typically 50–150 mV below the host rail (Temperature & voltage).

Low-speed pins and who handles them

Pin definitions per family: SFP hardware, QSFP hardware.

Heat path

Electronics and optics dissipate into the metal housing, which is the module's heat sink; the cage's riding heat sink and the chassis airflow take it from there. Thermal pads couple the DSP and the laser driver to the housing. A module rated at 70 °C case can run its DSP junction 20–30 °C hotter — the reason airflow, not "the room being cool", decides module life.

What fails on the board

In CodingBox

Everything the electronics measure and control appears on the bench: DDM values and flags on DDM, Tx disable and rate-select state, the CMIS module state, and the identity that declares power class and CDR presence in the EEPROM editor. A module whose bias is at the driver's ceiling while Tx power sags is a board telling you its laser is finished.