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Français SmartNICs and DPUs: optics on programmable adapters
A data processing unit (DPU) or SmartNIC is a NIC with its own processors, memory and operating system, sitting between the server's PCIe bus and the network. For the optics nothing changes at the cage — the same QSFP56/QSFP112/OSFP modules and cables — but the entity that reads the module, applies policy and configures speed and FEC is now a small computer on the card, often running a Linux or SONiC-like stack. This page lists the current DPU families and their ports, explains where module management lives, and covers the optics-specific consequences: power, cooling, twin-port cages and AI back-end fabrics.
Families and ports
| Family | Generation | Ports | Cages | Host PCIe | Cores |
|---|---|---|---|---|---|
| Nvidia BlueField-2 | 2020 | 2 × 25/100G or 1 × 200G | SFP56 / QSFP56 | Gen 4 x16 | 8 × Arm A72 |
| Nvidia BlueField-3 | 2023 | 2 × 200G or 1 × 400G; SuperNIC variants 400G | QSFP112 / OSFP | Gen 5 x16 | 16 × Arm A78 |
| Nvidia ConnectX-8 SuperNIC | 2024–25 | 1 × 800G or 2 × 400G | OSFP (twin-port) / QSFP112 | Gen 6 x16 | (NIC + limited programmability) |
| AMD Pensando Elba / Giglio / Salina (400) | 2021–25 | 2 × 100/200G; 2 × 400G | QSFP56 / QSFP112 | Gen 4/5 x16 | 16 × Arm A72/N1 + P4 pipeline |
| Intel IPU E2000 (Mount Evans) | 2022 | 2 × 100G (200G total) | QSFP28/56 | Gen 4 x16 | 16 × Arm N1 + P4 |
| Marvell Octeon 10 DPU | 2022 | up to 400G aggregate | QSFP-DD | Gen 5 | Arm N2 |
| Microsoft/Fungible, Napatech, Xilinx Alveo SN1000 | various | 2 × 100G | QSFP28 | — | FPGA / MIPS |
Port cages and speeds follow the same rules as plain NICs (NIC ports & PCIe).
Where module management lives
| Mode | Who reads the module | Tools |
|---|---|---|
| Embedded / DPU mode (Arm side owns the ports) | the DPU's own OS (Ubuntu/DOCA, SONiC-DASH, vendor Linux) via its driver | ethtool -m, mlxlink on the Arm side; host sees virtual functions only |
| Separated host / NIC mode | host driver, as on a ConnectX | host ethtool, mlxlink (NIC tools) |
| Restricted mode | DPU controls, host cannot change link settings | policy enforced on the DPU |
Consequences: firmware and link settings (speed, FEC, breakout) are configured on the DPU (mlxconfig, DOCA tools, Pensando penctl) and survive host reboots; a module rejected or downgraded by the DPU is invisible to the host administrator until the DPU's logs are read. Module policy itself is permissive on Nvidia and AMD (parses any EEPROM), as on their NICs (Optics compatibility on NICs).
Power and cooling
| Item | DPU reality |
|---|---|
| Card power | 75–150 W (BlueField-3 ~150 W with aux connector) — the card itself is hotter than any module on it |
| Cage budget | QSFP112/OSFP cages sized for 15–20 W modules; check the card's spec |
| Airflow | full-height cards in GPU servers share a hot aisle with GPUs; module DDM temperature 60–70 °C is normal, alarms at 75+ (Temperature grades) |
| Twin-port OSFP | one OSFP cage carries 2 × 400G; the module (or twin-port DAC/AOC) is a single 800G-class device with its own heat sink (OSFP) |
| Optics choice | DAC where the ToR is within 2 m, otherwise AOC or 400G/800G DR/FR; LPO variants cut module power on short links (Power & consumption) |
AI back-end fabrics
In GPU clusters a DPU or SuperNIC per GPU connects to the rail-optimised back-end fabric, InfiniBand or RoCE Ethernet (GPU fabrics):
| Link | Typical optics |
|---|---|
| NDR 400G IB per GPU | twin-port OSFP 2 × 400G; DAC/ACC ≤ 3 m to rail leaf, AOC 3–50 m, DR4/SR4 optics further (IB cables) |
| XDR 800G IB / 800G Ethernet per GPU | OSFP 800G twin-port, 2 × DR4 or SR8 |
| Front-end / storage | separate 100/200G ports on the DPU or a second NIC |
Cable identity and length are validated by the fabric manager; module firmware versions are part of the cluster's qualified bill of materials (Cabling an AI cluster, Link reliability & monitoring).
SONiC and P4 on the card
DPUs running SONiC-DASH or P4 pipelines treat their ports like a small switch: port breakout, FEC and speed are set in the DPU's configuration database, and transceiver EEPROM appears under the same show interfaces transceiver commands as on a SONiC switch (NOS landscape). Behaviour toward third-party modules is that of the platform plugin — permissive.
In CodingBox
A module destined for a DPU is qualified like one for a switch or NIC: form factor and compliance (QSFP112/OSFP, 400G/800G applications in CMIS), power class against the cage, and firmware version for the cluster's BOM — all readable on the bench before the card is installed (Check transceiver, CMIS).