CodingBox Documentation

Selecting and commissioning a switch with optics in mind

Optics are where a switch project meets reality: the box is chosen for ports, features and price, and then a module that "should work" does not, the uplink cage cannot power the 40 km optic, the airflow is backwards for the rack, or the first software upgrade errdisables half the links. This page is two checklists — what to check about optics when selecting a switch, and how to commission it from unboxing to a DDM baseline — plus an acceptance test that catches marginal links before users do.

Selection criteria

CriterionQuestion to answerWhere the answer lives
Port count and speedshow many downlinks at which speed, how many uplinks, growth for 3–5 yearsdesign (Roles & topologies)
Oversubscriptiondownlink ÷ uplink capacity acceptable for the trafficPorts & uplinks
Cage generationsSFP28 vs SFP56, QSFP28 vs QSFP-DD/OSFP; which older modules the cages acceptPort types & cages
Speed and breakout rulesport groups, which ports break out, 1G support in SFP+ cages, QSAhardware installation guide
Optics policystrict OEM, list-checking, permissive; documented override; effect of upgradesHow each NOS validates a module
Supported-optics listare the PMDs you need (LR, ER, BiDi, CWDM, DWDM tunable, 100G ZR) on the platform's listCompatibility matrices
Cage power budgetclass per port; ZR/tunable/10GBASE-T SFP+ supportPower & consumption
Airflow directionport-side intake or exhaust SKU matching the rackSwitch classes
Environmentambient range; industrial grade needed?Temperature grades
Forwarding featuresL2/L3, VXLAN/EVPN, MLAG, PFC/ECN for storage/AIForwarding basics
Stacking / pairingstack cables or front-port VCP; MLAG peer-link ports consumedStacking & MLAG
ManagementOOB port, console type, APIs, telemetry for DDM, SNMP MIBsManagement & monitoring
Software lifecyclerelease cadence, LTS trains, ISSU, end-of-support datesvendor lifecycle pages
Support modelwhat the vendor supports with third-party optics; TAC stancecontract
Total costswitch + licences + optics (often 30–60 % of the port cost at 100G+) + power + sparesBOM
RedundancyPSUs, fans, supervisors; uplinks on different modulesSwitch classes

Optics bill of materials

ItemCount rule
Downlink DAC/AOCone per server port, length by rack position (1/2/3 m)
Uplink modules2 × (uplinks per switch) — both ends
Breakout cablesper split port; MPO trunks and cassettes for parallel optics (Breakout & MPO)
Stack / peer-link cablesper pair or ring
Management1G copper or LX per switch to the OOB network
Spares5–10 % per type, at least 2 of each; more for long-lead items (ER, DWDM)
Cleaning and testone-click cleaners, inspection scope, light source/power meter, a reference module per type

Commissioning checklist

  1. Unbox and inspect — serial numbers, PSUs, fan trays, airflow SKU, uplink modules; photograph the faceplate.
  2. Inventory the optics — read every module on the bench (vendor, PN, SN, date, compliance, power class, firmware) and record it against its planned port (Check transceiver, Code database).
  3. Console in — set the management IP on the OOB port and VRF, credentials, NTP, syslog, SNMP/telemetry targets (Management & monitoring).
  4. Software — upgrade to the target release before configuring ports; read the release notes for transceiver items (Compatibility matrices & firmware).
  5. Policy linesservice unsupported-transceiver / allow-unsupported-transceiver / transceiver phony-alarm-disable if the fleet needs them; errdisable recovery.
  6. Port configuration — speeds, FEC, auto-negotiation (on for DAC, off for optics), breakout maps, descriptions, LAG/MLAG membership (Port configuration recipes).
  7. Insert modules — clean every connector, insert with the bail open, listen for the latch; DAC/AOC pull tabs upward on dual-row cages as the guide says.
  8. Verify each port — module recognised, correct type string, link up at intended speed, FEC counters zero (Verifying optics on a switch).
  9. Baseline DDM — record Rx/Tx power, bias, temperature per port ("link passport"); compare Rx to the budget (Monitoring, Rx power & budget).
  10. Acceptance test — see below.
  11. Document — port map, optics inventory with serials, cable IDs, photos, config backup; label both cable ends.
  12. Spares on site — stored in ESD bags, dust caps on.

Acceptance test

TestMethodPass
Link stabilitymonitor carrier-transitions / flap counters for 24 hzero flaps
Error-freeCRC/FCS and FEC uncorrectable counters after 24 h of trafficzero uncorrectable; corrected FEC stable, not climbing
Throughputiperf/TRex between hosts across each uplink (or LAG member pinned)≥ 95 % of line rate
Power marginRx power vs sensitivity per link≥ 3 dB margin (≥ 2 dB for SR on MMF)
Temperaturemodule DDM temperature at full fan speed and at normalbelow high-warning with ≥ 10 °C margin
Failoverpull one uplink / one PSU / one stack cabletraffic continues, alarms raised, restores cleanly
Redundant-path checkshut one MLAG peer / spineECMP/LAG reconverges within design time
ManagementSNMP walk of transceiver objects, telemetry subscription, syslog receiptdata arrives for every port

Common commissioning mistakes

MistakeConsequenceFix
Configuring ports before the software upgradepolicy or syntax changes on upgradeupgrade first
Mixed airflow SKUs in one rack rowhot optics on the reversed boxorder matching SKUs
40 km / ZR module in a cage rated class 4module stays in low powercheck budgets (Power & thermal)
AN left on for optics, off for DAClink down with good levelsFEC & AN
No cleaning before insertionmarginal Rx from day oneclean and inspect
Third-party optics untested on the platform/releaseerrdisable on a Fridaytest one of each first (Third-party optics)
No DDM baselinelater degradation invisiblerecord the passport
Unlabelled cables and undocumented breakout childrenhours lost in every incidentlabel and document (Port naming & LEDs)

In CodingBox

Step 2 of the commissioning list is the bench: reading every module before it is racked produces the inventory, catches wrong PMDs and mislabelled parts, and — where the platform demands it — is the moment to code identities so that step 8 passes on the first try (Check transceiver, EEPROM editor).